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Aditya Manglik
Aditya Manglik
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Title
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Cited by
Year
Adaptive gait generation for hexapod robot using genetic algorithm
A Manglik, K Gupta, S Bhanot
2016 IEEE 1st International Conference on Power Electronics, Intelligent …, 2016
182016
Genpip: In-memory acceleration of genome analysis via tight integration of basecalling and read mapping
H Mao, M Alser, M Sadrosadati, C Firtina, A Baranwal, DS Cali, A Manglik, ...
2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO), 710-726, 2022
132022
A case for transparent reliability in DRAM systems
M Patel, T Shahroodi, A Manglik, AG Yaglikci, A Olgun, H Luo, O Mutlu
arXiv preprint arXiv:2204.10378, 2022
122022
Resistive crossbar-aware neural network design and optimization
MA Hanif, A Manglik, M Shafique
IEEE Access 8, 229066-229085, 2020
102020
Accelerating time series analysis via processing using non-volatile memories
I Fernandez, A Manglik, C Giannoula, R Quislant, NM Ghiasi, ...
arXiv preprint arXiv:2211.04369, 2022
32022
NEON: Enabling Efficient Support for Nonlinear Operations in Resistive RAM-based Neural Network Accelerators
A Manglik, M Patel, H Mao, B Salami, J Park, L Orosa, O Mutlu
arXiv preprint arXiv:2211.05730, 2022
22022
RevaMp3D: Architecting the Processor Core and Cache Hierarchy for Systems with Monolithically-Integrated Logic and Memory
NM Ghiasi, M Sadrosadati, GF Oliveira, K Kanellopoulos, ...
arXiv preprint arXiv:2210.08508, 2022
12022
MATSA: An MRAM-based Energy-Efficient Accelerator for Time Series Analysis
I Fernandez, C Giannoula, A Manglik, R Quislant, NM Ghiasi, ...
IEEE Access, 2024
2024
Rethinking the Producer-Consumer Relationship in Modern DRAM-Based Systems
M Patel, T Shahroodi, A Manglik, AG Yağlıkçı, A Olgun, H Luo, O Mutlu
arXiv preprint arXiv:2401.16279, 2024
2024
RevaMp3D: Architecting the Processor Core and Cache Hierarchy for Systems with Monolithically-Integrated Logic and Memory
N Mansouri Ghiasi, M Sadrosadati, GF Oliveira, C Kanellopoulos, ...
arXiv, 2210.08508, 2022
2022
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