| High-precision PLL delay matrix with overclocking and double data rate for accurate FPGA time-to-digital converters P Chen, JT Lan, RT Wang, NM Qui, JCJS Marquez, S Kajihara, Y Miyake IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (4), 904-913, 2020 | 18 | 2020 |
