| Thermal aware low power universal asynchronous receiver transmitter design on FPGA S Singh, A Jain, A Kaur, B Pandey 2014 International Conference on Computational Intelligence and …, 2014 | 21 | 2014 |
| Internet of things enabled energy efficient green communication on FPGA K Kaur, B Pandey, J Kumar, A Jain, P Kaur 2014 International Conference on Computational Intelligence and …, 2014 | 9 | 2014 |
| Low Voltage Digitally Controlled Impedance Based Energy Efficient Vedic Multiplier Design on 28nm FPGA K Goswami, B Pandey, A Jain, D Singh 2014 International Conference on Computational Intelligence and …, 2014 | 6 | 2014 |
| Energy efficient and high–performance FIR filter design on Spartan–6 FPGA B Pandey, A Jain, A Kumar, P Kumar, A Hussain, J Levy, BS Chowdhry 3c Tecnología: glosas de innovación aplicadas a la pyme 8 (1), 36-49, 2019 | 3 | 2019 |
| Frequency scaling based low power ORIYA UNICODE READER (OUR) design ON 40nm and 28nm FPGA A Kaur, K Kumar, A Sandhu, A Kaur, A Jain, B Pandey International Journal of Recent Technology and Engineering (IJRTE) ISSN …, 2019 | 2 | 2019 |
| Power‐efficient optimized clustering method with intelligent fog computing for wireless sensor network s A Jain, AK Bhardwaj Concurrency and Computation: Practice and Experience 34 (15), e6983, 2022 | 1 | 2022 |
| Machine Learning Based Power Efficient Optimized Communication Ensemble Model with Intelligent Fog Computing for WSNs A Jain, AK Bhardwaj Wireless Personal Communications 131 (1), 415-429, 2023 | | 2023 |
Dr. Bishwajeet PandeyAstana IT University, KazaksthanVerified email at gssi.it
