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Jannis Stoppe
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Data extraction from SystemC designs using debug symbols and the SystemC API
J Stoppe, R Wille, R Drechsler
2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 26-31, 2013
262013
AIBA: an Automated Intra-cycle Behavioral Analysis for SystemC-based design exploration
M Goli, J Stoppe, R Drechsler
2016 IEEE 34th International Conference on Computer Design (ICCD), 360-363, 2016
232016
Automated nonintrusive analysis of electronic system level designs
M Goli, J Stoppe, R Drechsler
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018
222018
Automatic protocol compliance checking of SystemC TLM-2.0 simulation behavior using timed automata
M Goli, J Stoppe, R Drechsler
2017 IEEE International Conference on Computer Design (ICCD), 377-384, 2017
202017
Automatic equivalence checking for SystemC-TLM 2.0 models against their formal specifications
M Goli, J Stoppe, R Drechsler
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017
182017
Analyzing SystemC designs: SystemC analysis approaches for varying applications
J Stoppe, R Drechsler
Sensors 15 (5), 10399-10421, 2015
152015
Resilience evaluation for approximating SystemC designs using machine learning techniques
M Goli, J Stoppe, R Drechsler
2018 International Symposium on Rapid System Prototyping (RSP), 97-103, 2018
142018
Dealing with highly unbalanced sidescan sonar image datasets for deep learning classification tasks
Y Steiniger, J Stoppe, T Meisen, D Kraus
Global Oceans 2020: Singapore–US Gulf Coast, 1-7, 2020
132020
Automated feature localization for dynamically generated SystemC designs
J Stoppe, R Wille, R Drechsler
2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 277-280, 2015
132015
Validating SystemC implementations against their formal specifications
J Stoppe, R Wille, R Drechsler
Proceedings of the 27th Symposium on Integrated Circuits and Systems Design, 1-8, 2014
132014
Verification-driven design across abstraction levels: A case study
N Przigoda, J Stoppe, J Seiter, R Wille, R Drechsler
2015 Euromicro Conference on Digital System Design, 375-382, 2015
122015
Hardware/software co-visualization on the electronic system level using systemc
R Drechsler, J Stoppe
2016 29th International Conference on VLSI Design and 2016 15th …, 2016
102016
Detection and geovisualization of abnormal vessel behavior from video
E Solano-Carrillo, B Carrillo-Perez, T Flenker, Y Steiniger, J Stoppe
2021 IEEE International Intelligent Transportation Systems Conference (ITSC …, 2021
82021
Bioviz: An interactive visualization engine for the design of digital microfluidic biochips
J Stoppe, O Keszocze, M Luenert, R Wille, R Drechsler
2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 170-175, 2017
82017
Change impact analysis for hardware designs from natural language to system level
M Ring, J Stoppe, C Luth, R Drechsler
2016 Forum on Specification and Design Languages (FDL), 1-7, 2016
82016
Effects of cell shapes on the routability of digital microfluidic biochips
L Schneider, O Keszocze, J Stoppe, R Drechsler
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017
72017
A study on modern deep learning detection algorithms for automatic target recognition in sidescan sonar images
Y Steiniger, J Groen, J Stoppe, D Kraus, T Meisen
Proceedings of Meetings on Acoustics 44 (1), 2021
62021
Cone of influence analysis at the electronic system level using machine learning
J Stoppe, R Wille, R Drechsler
2013 Euromicro Conference on Digital System Design, 582-587, 2013
52013
A Backwards Compatible Approach to Authenticate Automatic Identification System Messages
MC Struck, J Stoppe
2021 IEEE International Conference on Cyber Security and Resilience (CSR …, 2021
42021
Revvis: Visualization of structures and properties in reversible circuits
R Wille, J Stoppe, E Schönborn, K Datta, R Drechsler
Reversible Computation: 6th International Conference, RC 2014, Kyoto, Japan …, 2014
42014
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