Design and implementation of low-power ANSI S1. 11 filter bank for digital hearing aids YT Kuo, TJ Lin, YT Li, CW Liu IEEE Transactions on Circuits and Systems I: Regular Papers 57 (7), 1684-1696, 2009 | 80 | 2009 |
Overview of ITRI PAC project-from VLIW DSP processor to multicore computing platform TJ Lin, CN Liu, SY Tseng, YH Chu, AY Wu 2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI …, 2008 | 57 | 2008 |
Method for inter-cluster communication that employs register permutation CW Jen, TJ Lin, CC Lee, CC Chang, CW Liu US Patent App. 10/787,211, 2005 | 51 | 2005 |
A unified processor architecture for RISC & VLIW DSP TJ Lin, CM Chao, CH Liu, PC Hsiao, SK Chen, LC Lin, CW Liu, CW Jen Proceedings of the 15th ACM Great Lakes symposium on VLSI, 50-55, 2005 | 27 | 2005 |
Complexity-effective auditory compensation for digital hearing aids YT Kuo, TJ Lin, WH Chang, YT Li, CW Liu, ST Young 2008 IEEE International Symposium on Circuits and Systems (ISCAS), 1472-1475, 2008 | 25 | 2008 |
A 0.48 V 0.57 nJ/pixel video-recording SoC in 65nm CMOS TJ Lin, CA Chien, PY Chang, CW Chen, PH Wang, TY Shyu, CY Chou, ... 2013 IEEE International Solid-State Circuits Conference Digest of Technical …, 2013 | 23 | 2013 |
Parallel architecture core (PAC)—The first multicore application processor SoC in Taiwan part I: Hardware architecture & software development tools DCW Chang, TJ Lin, CJ Wu, JK Lee, YH Chu, AY Wu Journal of Signal Processing Systems 62, 373-382, 2011 | 22 | 2011 |
An efficient VLIW DSP architecture for baseband processing TJ Lin, CC Chang, CC Lee, CW Jen Proceedings 21st International Conference on Computer Design, 307-312, 2003 | 21 | 2003 |
A 4R/2W register file design for UDVS microprocessors in 65-nm CMOS PY Chang, TJ Lin, JS Wang, YH Yu IEEE Transactions on Circuits and Systems II: Express Briefs 59 (12), 908-912, 2012 | 19 | 2012 |
Method and corresponding apparatus for compiling high-level languages into specific processor architectures TJ Lin, CM Chao, CW Liu, CW Jen, IT Liao, PH Huang US Patent 7,877,741, 2011 | 19 | 2011 |
Design and implementation of a high-performance and complexity-effective VLIW DSP for multimedia applications TJ Lin, SK Chen, YT Kuo, CW Liu, PC Hsiao Journal of Signal Processing Systems 51, 209-223, 2008 | 19 | 2008 |
Multitasking processor and task switching method thereof TJ Lin, PJ Huang, CW Liu, SK Chen, BS Wang US Patent App. 12/354,753, 2010 | 17 | 2010 |
Complexity-effective dynamic range compression for digital hearing aids KC Chang, YT Kuo, TJ Lin, CW Liu Proceedings of 2010 IEEE International Symposium on Circuits and Systems …, 2010 | 14 | 2010 |
Parallel object detection on multicore platforms SK Chen, TJ Lin, CW Liu 2009 IEEE Workshop on Signal Processing Systems, 075-080, 2009 | 14 | 2009 |
Design of ANSI S1. 11 filter bank for digital hearing aids YT Kuo, TJ Lin, YT Li, WH Chang, CW Liu, ST Young 2007 14th IEEE International Conference on Electronics, Circuits and Systems …, 2007 | 14 | 2007 |
A compact DSP core with static floating-point arithmetic TJ Lin, HY Lin, CM Chao, CW Liu, CW Jen Journal of VLSI signal processing systems for signal, image and video …, 2006 | 14 | 2006 |
A novel register organization for VLIW digital signal processors TJ Lin, CC Lee, CW Liu, CW Jen 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and …, 2005 | 13 | 2005 |
Performance scaling device, processor having the same, and performance scaling method thereof CH Lin, P Hsiao, TJ Lin, GK Ma US Patent 8,589,718, 2013 | 11 | 2013 |
Hierarchical memory scheduling for multimedia MPSoCs YJ Lin, CL Yang, TJ Lin, JW Huang, N Chang 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 190-196, 2010 | 11 | 2010 |
Energy-effective design & implementation of an embedded VLIW DSP TW Hsieh, PC Hsiao, CY Liao, HC Hsieh, HL Lin, TJ Lin, YH Chu, AY Wu 2008 International SoC Design Conference 1, I-252-I-255, 2008 | 11 | 2008 |