| Litho-driven layouts for reducing performance variability M Garg, A Kumar, J van Wingerden, L Le Cam 2005 IEEE International Symposium on Circuits and Systems, 3551-3554, 2005 | 118 | 2005 |
| A/spl uml/nalysis of floating body effects in thin film conventional and single pocket SOI MOSFETs using the GIDL current technique MV Dunga, A Kumar, J Vasi, VR Rao, B Cheng, JCS Woo IEEE Electron Device Letters 23 (4), 209-211, 2002 | 21 | 2002 |
| Balancing resistance and capacitance of signal interconnects for power saving VN Hoang, G Doornbos, J Michelon, A Kumar, A Nackaerts, P Christie 2007 IEEE International Interconnect Technology Conferencee, 126-128, 2007 | 12 | 2007 |
| The impact of back-end-of-line process variations on critical path timing VN Hoang, A Kumar, P Christie 2006 International Interconnect Technology Conference, 193-195, 2006 | 12 | 2006 |
| An analysis of the effect of wire resistance on circuit level performance at the 45-nm technology node VH Nguyen, P Christie, A Heringa, A Kumar, R Ng Proceedings of the IEEE 2005 International Interconnect Technology …, 2005 | 12 | 2005 |
| Analysis of floating body effects in thin film SOI MOSFETs using the GIDL current technique MV Dunga, A Kumar, VR Rao Proceedings of the 2001 8th International Symposium on the Physical and …, 2001 | 11 | 2001 |
| Characterization of lateral asymmetric channel (LAC) thin film SOI MOSFETs MV Dunga, A Kumar, VR Rao, J Vasi 2001 6th International Conference on Solid-State and Integrated Circuit …, 2001 | 10 | 2001 |
| Lessons Learned in the Design and Delivery of an Introductory Programming MOOC JM Fitzpatrick, Á Lédeczi, G Narasimham, L Lafferty, R Labrie, PT Mielke, ... Proceedings of the 2017 ACM SIGCSE Technical Symposium on Computer Science …, 2017 | 7 | 2017 |
| A new cell-based performance metric for novel CMOS device architectures P Christie, A Heringa, G Doornbos, A Kumar, VH Nguyen, RKM Ng, ... IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004 …, 2004 | 4 | 2004 |
| Multifrequency Transconductance Technique for Interface Characterization of Deep Submicron SOI-MOSFETs A Kumar, S Mohapatra, R Lal, V Rao Ramgopal Microelectronics Reliability 41 (7), 1049-1051, 2001 | 4 | 2001 |
| Trigger sequence can influence final morphology in the self-assembly of asymmetric telechelic polymers A Kumar, CP Lowe, MAC Stuart, PG Bolhuis Soft matter 12 (7), 2095-2107, 2016 | 3 | 2016 |
| Balancing programmability and silicon efficiency of heterogeneous multicore architectures A Terechko, J Hoogerbrugge, G Alkadi, S Guntur, A Lahiri, M Duranton, ... ACM Transactions on Embedded Computing Systems (TECS) 11 (1), 1-32, 2012 | 3 | 2012 |
| Rapid design flows for advanced technology pathfinding P Christie, A Nackaerts, A Kumar, AS Terechko, G Doornbos 2008 IEEE International Electron Devices Meeting, 1-4, 2008 | 2 | 2008 |
| Suppression of parasitic BJT action in single pocket thin film deep sub-micron SOI MOSFETs. AK Mohan, V Dunga, VR Rao, J Vasi MRS Online Proceedings Library (OPL) 716, B1. 1, 2002 | 2 | 2002 |
| Rapid Circuit-based Optimization of Low Operational power CMOS Devices P Christie, A Nackaerts, T Hoffmann, A Kumar 2007 IEEE International Electron Devices Meeting, 573-576, 2007 | 1 | 2007 |
| XTREME LOW POWER TECHNOLOGY DEVELOPMENT USING A VIRTUAL DESIGN FLOW P Christie, RKM Ng, G Doornbos, A Heringa, A Kumar, VH Nguyen AmIware: Hardware Technology Drivers of Ambient Intelligence 5, 245, 2006 | 1 | 2006 |
| A simple and direct technique for interface characterization of SOI MOSFETs and its application in hot carrier degradation studies in sub-100 nm JVD MNSFETs A Kumar, R Lal, VR Rao Microelectronic engineering 59 (1-4), 429-433, 2001 | 1 | 2001 |
| Nurturing and Sustaining Growth Mindset During the Pandemic R Sinha, A Kumar Winter Always Turns To Spring: Narratives on Surviving the Pandemic Years, 2023 | | 2023 |
Phillip ChristieimecVerified email at imec.be
