| A Review - Performance analysis of various Multipliers for the design of digital processors DRT M.Prasannakumar. International Journal of Modern Electronics and Communication Engineering …, 2018 | 1 | 2018 |
| Comparative Analysis of Adders Parallel-Prefix Adder for Their Area, Delay and Power Consumption V Sidharthan, M Prasannakumar International Journal of Scientific Research in Science and Technology 4 (5 …, 2018 | 1 | 2018 |
| Implementation of Parallel Multiplier 4x4 Low Power Design Using FPGA MP Kumar, KA Kumar Journal of NanoScience and NanoTechnology 2 (2), 182-187, 2014 | 1 | 2014 |
| Fly Back Converter Based Energy Storage System Using FPGA MT Selvan, M Prasannakumar, JC Babu International Journal of Modern Electronics and Communication Engineering …, 2019 | | 2019 |
| Comparitive Analysis of Brent-Kang & Kogge- Stone Parallel-Prefix Adder for Their Area, Delay & Power Consumption M Prasannakumar, V Sidharthan, DK Gopalakrishnan INDIAN JOURNAL OF APPLIED RESEARCH 5 (10), 480-481, 2015 | | 2015 |
| IMPLEMENTATION OF CARRY SELECT ADDER BASED VEDIC MULTIPLIER FOR MINIMIZING THE PATH DELAY AND TO INCREASE THE EFFICIENCY OF THE PROCESSOR MM Prasannakumar, R Thangavel | | |
