| Python as a hardware description language: A case study JI Villar, J Juan, MJ Bellido, J Viejo, D Guerrero, J Decaluwe 2011 VII Southern Conference on Programmable Logic (SPL), 117-122, 2011 | 42 | 2011 |
| Long-term on-chip verification of systems with logical events scattered in time J Viejo, JI Villar, J Juan, A Millán, E Ostúa, J Quiros Microprocessors and Microsystems 36 (5), 402-408, 2012 | 4 | 2012 |
| Implementacion sobre FPGA de un cliente SNTP us-ando MicroBlaze J Quiros, J Viejo, A Muñoz, A Millan, E Ostua, JI Villar Proc. 16th Iberchip Workshop (IWS), 2010 | 2 | 2010 |
| Efficient techniques and methodologies for embedded system design usign free hardware and open standards JI Villar, J Juan, MJ Bellido 2009 International Conference on Field Programmable Logic and Applications …, 2009 | 1 | 2009 |
| evercodeML: A formal language for SoC integration JI Villar, J Juan, D Guerrero, MJ Bellido, J Viejo 2015 Electronic System Level Synthesis Conference (ESLsyn), 23-26, 2015 | | 2015 |
| Long-term on-chip verification of systems with logical events scattered in time J Viejo Cortés, JI Villar de Ossorno, J Juan Chico, A Millán Calderón, ... Microprocessors and Microsystems, 36 (5), 402-408., 2012 | | 2012 |
| Implementation of a configuration server for a hardware SNTP synchronization platform based on FPGA J Quiros, J Viejo, A Millan, A Muñoz, JI Villar, D Guerrero 2011 VII Southern Conference on Programmable Logic (SPL), 239-244, 2011 | | 2011 |
| Práctica de desarrollo de interfaces hardware/software para el manejo de sensores de redes inalámbricas ÁF Jiménez Fernández, MJ Domínguez Morales, E Cerezuela Escudero, ... JENUI 2011: XVIII Jornadas de Enseñanza Universitaria de la Informática (2011),, 2011 | | 2011 |
| Práctica de Laboratorio sobre implementación Joystick HID-USB de interfaz con una emisora RC R Paz Vicente, E Cerezuela Escudero, ÁF Jiménez Fernández, ... JENUI 2011: XVIII Jornadas de Enseñanza Universitaria de la Informática …, 2011 | | 2011 |
| Sistema de co-diseño hardware/software basado en FPGA para la captura de video analógico a través del bus serie USB ÁF Jiménez Fernández, R Paz Vicente, MJ Domínguez Morales, ... JENUI 2011: XVIII Jornadas de Enseñanza Universitaria de la Informática …, 2011 | | 2011 |
| Design and implementation of a suitable core for on-chip long-term verification J Viejo, JI Villar, J Juan, A Millán, MJ Bellido, E Ostúa International Symposium on Industrial Embedded System (SIES), 234-237, 2010 | | 2010 |
| Design and implementation of a suitable core for on-chip long-term verification J Viejo Cortés, JI Villar de Ossorno, J Juan Chico, A Millán Calderón, ... International Symposium on Industrial Embedded Systems, SIES 2010 (2010), p …, 2010 | | 2010 |
| Usando Python como HDL: estudio comparativo de resultados basado en el desarrollo de un periférico real JI Villar, JJ Chico, MJB Díaz, PR de Clavijo Vázquez, DG Martos, ... Actas de las IX Jornadas de computación reconfigurable y aplicaciones …, 2009 | | 2009 |
| Efficient techniques and methodologies for embedded system design usign free hardware and open standards JI Villar de Ossorno, J Juan Chico, MJ Bellido Díaz FPL 2009: International Conference on Field Programmable Logic and …, 2009 | | 2009 |
| Análisis del comportamiento de la videoconsola Atari 2600 como sistema digital real basado en microprocesador en el laboratorio de electrónica MJ Bellido, JJ Chico, D Guerrero, A Millán, E Ostua, P Ruiz, JI Villar Universidad de Sevilla, 1970 | | 1970 |
Jorge JuanProfesor Titular de Universidad, Universidad de Sevilla, EspañaVerified email at dte.us.es
