| On the MOSFET threshold voltage extraction by transconductance and transconductance-to-current ratio change methods: Part II—Effect of drain voltage T Rudenko, V Kilchytska, MKM Arshad, JP Raskin, A Nazarov, D Flandre IEEE Transactions on Electron Devices 58 (12), 4180-4188, 2011 | 64 | 2011 |
| On the MOSFET threshold voltage extraction by transconductance and transconductance-to-current ratio change methods: Part I—Effect of gate-voltage-dependent mobility T Rudenko, V Kilchytska, MKM Arshad, JP Raskin, A Nazarov, D Flandre IEEE Transactions on Electron Devices 58 (12), 4172-4179, 2011 | 60 | 2011 |
| Mobility enhancement effect in heavily doped junctionless nanowire silicon-on-insulator metal-oxide-semiconductor field-effect transistors T Rudenko, A Nazarov, I Ferain, S Das, R Yu, S Barraud, P Razavi Applied Physics Letters 101 (21), 2012 | 53 | 2012 |
| Carrier mobility in undoped triple-gate FinFET structures and limitations of its description in terms of top and sidewall channel mobilities T Rudenko, V Kilchytska, N Collaert, M Jurczak, A Nazarov, D Flandre IEEE transactions on electron devices 55 (12), 3532-3541, 2008 | 50 | 2008 |
| Experimental study of transconductance and mobility behaviors in ultra-thin SOI MOSFETs with standard and thin buried oxides T Rudenko, V Kilchytska, S Burignat, JP Raskin, F Andrieu, O Faynot, ... Solid-State Electronics 54 (2), 164-170, 2010 | 47 | 2010 |
| Method for extracting doping concentration and flat-band voltage in junctionless multigate MOSFETs using 2-D electrostatic effects T Rudenko, R Yu, S Barraud, K Cherkaoui, A Nazarov IEEE Electron Device Letters 34 (8), 957-959, 2013 | 28 | 2013 |
| Reduction of gate-to-channel tunneling current in FinFET structures T Rudenko, V Kilchytska, N Collaert, M Jurczak, A Nazarov, D Flandre Solid-state electronics 51 (11-12), 1466-1472, 2007 | 26 | 2007 |
| Substrate bias effect linked to parasitic series resistance in multiple-gate SOI MOSFETs T Rudenko, V Kilchytska, N Collaert, M Jurczak, A Nazarov, D Flandre IEEE Electron Device Letters 28 (9), 834-836, 2007 | 25 | 2007 |
| Experimental evidence for reduction of gate tunneling current in FinFET structures and its dependence on the fin width T Rudenko, A Nazarov, V Kilchytska, D Flandre, N Collaert, M Jurczak 2006 European Solid-State Device Research Conference, 375-378, 2006 | 7 | 2006 |
| Influence of drain voltage on MOSFET threshold voltage determination by transconductance change and gm/Id methods T Rudenko, V Kilchytska, MKM Arshad, JP Raskin, A Nazarov, D Flandre Ulis 2011 Ultimate Integration on Silicon, 1-4, 2011 | 5 | 2011 |
| Special features of the back-gate effects in UTB SOI MOSFETs T Rudenko, V Kilchytska, JP Raskin, F Andrieu, O Faynot, Y Le Tiec, ... 6th International SemOI Conference and 1st Ukrainian-French Seminar …, 2010 | 2 | 2010 |
| Evidence for Substrate Bias Effects in SOI ΩFETs T Rudenko, V Kilchytska, N Collaert, M Jurczak, A Nazarov, D Flandre Proc. Int. Conf. EUROSOI, 23-25, 0 | 1 | |
| Impact of mobility variation on threshold voltage extraction by transconductance change and gm/Id methods and its demonstration on advanced SOI MOSFETs C Rudenko, V Kilchytska, MK Md Arshad, JP Raskin, A Nazarov, ... Sixth Workshop of the Thematic Network on Silicon on Insulator technology …, 2011 | | 2011 |
