Follow
Dr. Poorvasha S
Dr. Poorvasha S
Lead TCAD AE
Verified email at cognitivetech.co.in
Title
Cited by
Cited by
Year
Tunable work function in Junctionless Tunnel FETs for performance enhancement
RN Goswami, S Poorvasha, B Lakshmi
Australian journal of electrical and electronics engineering 15 (3), 80-85, 2018
62018
Influence of structural and doping parameter variations on Si and double gate tunnel FETs: An analysis for RF performance enhancement
S Poorvasha, B Lakshmi
Pramana 91, 1-8, 2018
32018
Investigation and statistical modeling of InAs-based double gate tunnel FETs for RF performance enhancement
S Poorvasha, B Lakshmi
Journal of Semiconductors 39 (5), 054001, 2018
32018
Performance of asymmetric gate oxide on gate-drain overlap in Si and Si1−xGexdouble gate tunnel FETs
S Poorvasha, B Lakshmi
2016 International Conference on VLSI Systems, Architectures, Technology and …, 2016
22016
Tunnel field effect transistors for digital and analog applications: a review
S Poorvasha, M Pown, B Lakshmi
Indian Journal of Science and Technology, 2017
12017
Investigation of the Device Electrical Parameters for Homo and Hetero Junction Based TFETs
S Poorvasha, B Lakshmi
Silicon, 1-10, 2022
2022
Investigation of geometrical and doping parameter variations on GaSb/Si‐based double gate tunnel FETs: A qualitative and quantitative approach for RF performance enhancement
P Shanmuganathan, L Balasubramanian
International Journal of Numerical Modelling: Electronic Networks, Devices …, 2019
2019
Analytical Approximation of Quantum Mechanical Tunneling and Characterization of Nano-Scale Heterojunction Double Gate Tunnel FETs
S Poorvasha, B Lakshmi
2019 International Conference on Manipulation, Automation and Robotics at …, 2019
2019
The system can't perform the operation now. Try again later.
Articles 1–8