| A high throughput parallel hash table accelerator on HBM-enabled FPGAs Y Yang, SR Kuppannagari, VK Prasanna 2020 International Conference on Field-Programmable Technology (ICFPT), 148-153, 2020 | 14 | 2020 |
| FPGA accelerator for homomorphic encrypted sparse convolutional neural network inference Y Yang, SR Kuppannagari, R Kannan, VK Prasanna 2022 IEEE 30th Annual International Symposium on Field-Programmable Custom …, 2022 | 13 | 2022 |
| Shared memory heterogeneous computation on PCIe-supported platforms SK Shukla, Y Yang, LN Bhuyan, P Brisk 2013 23rd International Conference on Field programmable Logic and …, 2013 | 13 | 2013 |
| FASTHash: FPGA-Based High Throughput Parallel Hash Table Y Yang, SR Kuppannagari, A Srivastava, R Kannan, VK Prasanna High Performance Computing: 35th International Conference, ISC High …, 2020 | 11 | 2020 |
| An efficient dynamic multiple-candidate motion vector approach for GPU-based hierarchical motion estimation D Vu, Y Yang, L Bhuyan 2012 IEEE 31st International Performance Computing and Communications …, 2012 | 11 | 2012 |
| NTTGen: a framework for generating low latency NTT implementations on FPGA Y Yang, SR Kuppannagari, R Kannan, VK Prasanna Proceedings of the 19th ACM International Conference on Computing Frontiers …, 2022 | 8 | 2022 |
| A high throughput parallel hash table on fpga using xor-based memory R Zhang, S Wijeratne, Y Yang, SR Kuppannagari, VK Prasanna 2020 IEEE High performance extreme computing conference (HPEC), 1-7, 2020 | 8 | 2020 |
| Fpga acceleration of number theoretic transform T Ye, Y Yang, SR Kuppannagari, R Kannan, VK Prasanna High Performance Computing: 36th International Conference, ISC High …, 2021 | 7 | 2021 |
| How to efficiently train your ai agent? characterizing and evaluating deep reinforcement learning on heterogeneous platforms Y Meng, Y Yang, S Kuppannagari, R Kannan, V Prasanna 2020 IEEE High Performance Extreme Computing Conference (HPEC), 1-7, 2020 | 7 | 2020 |
| Design of Multi-Priority Adaptive Routing Algorithm for Network-on-Chip JH Li, Y Yang, XL Liu, JC Wang Jisuanji Gongcheng/ Computer Engineering 37 (20), 2011 | 1* | 2011 |
| FPGA Acceleration of Rotation in Homomorphic Encryption Using Dynamic Data Layout Y Yang, W Long, R Kannan, VK Prasanna 2023 33rd International Conference on Field-Programmable Logic and …, 2023 | | 2023 |
| Parallel Totally Induced Edge Sampling on FPGAs 1 A Goel, SR Kuppannagari, Y Yang, A Srivastava, VK Prasanna Parallel Computing: Technology Trends, 671-680, 2020 | | 2020 |
| Communication queue management system M Gulati, CD Shuler, BK Dodge, TM Vijayaraj, H Kaushikkar, Y Yang, ... US Patent App. 15/246,046, 2018 | | 2018 |
| An FPGA-optimized high resolution time-to-digital converter array Y Yang, R Aiwu, L Yongbo, W Wenjie Application of Electronic Technique, 2011 | | 2011 |
