| Toward an open-source digital flow: First learnings from the openroad project T Ajayi, VA Chhabria, M Fogaça, S Hashemi, A Hosny, AB Kahng, M Kim, ... Proceedings of the 56th Annual Design Automation Conference 2019, 1-4, 2019 | 143 | 2019 |
| OpenROAD: Toward a self-driving, open-source digital layout implementation tool chain T Ajayi, D Blaauw Proceedings of Government Microcircuit Applications and Critical Technology …, 2019 | 80 | 2019 |
| Using machine learning to predict path-based slack from graph-based timing analysis AB Kahng, U Mallappa, L Saul 2018 IEEE 36th International Conference on Computer Design (ICCD), 603-612, 2018 | 45 | 2018 |
| " Unobserved Corner" Prediction: Reducing Timing Analysis Effort for Faster Design Convergence in Advanced-Node Design AB Kahng, U Mallappa, L Saul, S Tong 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 168-173, 2019 | 34 | 2019 |
| Template-based PDN synthesis in floorplan and placement using classifier and CNN techniques VA Chhabria, AB Kahng, M Kim, U Mallappa, SS Sapatnekar, B Xu 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC), 44-49, 2020 | 33 | 2020 |
| Gra-lpo: Graph convolution based leakage power optimization U Mallappa, CK Cheng Proceedings of the 26th Asia and South Pacific Design Automation Conference …, 2021 | 8 | 2021 |
| RLPlace: Deep RL guided heuristics for detailed placement optimization U Mallappa, S Pratty, D Brown 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 120-123, 2022 | 7 | 2022 |
| Marina Neseem, et al. 2019. Toward an open-source digital flow: First learnings from the openroad project T Ajayi, VA Chhabria, M Fogaça, S Hashemi, A Hosny, AB Kahng, M Kim, ... Proceedings of the 56th Annual Design Automation Conference 2019, 0 | 4 | |
| DAGSizer: A Directed Graph Convolutional Network Approach to Discrete Gate Sizing of VLSI Graphs CK Cheng, C Holtz, AB Kahng, B Lin, U Mallappa ACM Transactions on Design Automation of Electronic Systems 28 (4), 1-31, 2023 | 3 | 2023 |
| Patternet: explore and exploit filter patterns for efficient deep neural networks B Khaleghi, U Mallappa, D Yaldiz, H Yang, M Shah, J Kang, T Rosing Proceedings of the 59th ACM/IEEE Design Automation Conference, 223-228, 2022 | 2 | 2022 |
| JARVA: Joint Application-Aware Oblivious Routing and Static Virtual Channel Allocation. U Mallappa, CK Cheng, B Lin IEEE Des. Test 39 (6), 16-27, 2022 | 1 | 2022 |
| Using collaborative conversational agents and metric prediction to perform prompt-based physical circuit design MAM Siddhartha Nath, Rajeshkumar Sambandam, Uday Mallappa, Somdeb Majumdar ... US Patent App. 18/477,844, 2024 | | 2024 |
| TermiNETor: Early Convolution Termination for Efficient Deep Neural Networks U Mallappa, P Gangwar, B Khaleghi, H Yang, T Rosing 2022 IEEE 40th International Conference on Computer Design (ICCD), 635-643, 2022 | | 2022 |
| TermiNETor: Early Convolution Termination for Efficient Deep Neural Networks HYTR U. Mallappa, P. Gangwar, B. Khaleghi 2022 IEEE 40th International Conference on Computer Design (ICCD), 635-643, 2022 | | 2022 |
| Joint Application-Aware Oblivious Routing and Static Virtual Channel Allocation U Mallappa, CK Cheng, B Lin IEEE Embedded Systems Letters 14 (4), 175-178, 2022 | | 2022 |
| AI for Design Optimization and Design for AI Acceleration U Mallappa University of California, San Diego, 2022 | | 2022 |
Andrew B. KahngProfessor of CSE and ECE, UC San DiegoVerified email at eng.ucsd.edu
