Fast algorithm of attribute reduction based on the complementation of Boolean function G Borowik, T Łuba Advanced Methods and Applications in Computational Intelligence, 25-41, 2014 | 67 | 2014 |
5 logic synthesis method of digital circuits designed for implementation with embedded memory blocks of FPGAs M Rawski, P Tomaszewicz, G Borowik, T Łuba Design of Digital Systems and Devices, 121-144, 2011 | 55 | 2011 |
Time series analysis for crime forecasting G Borowik, ZM Wawrzyniak, P Cichosz 2018 26th International Conference on Systems Engineering (ICSEng), 1-10, 2018 | 40 | 2018 |
A software architecture assisting workflow executions on cloud resources G Borowik, M Woźniak, A Fornaia, R Giunta, C Napoli, G Pappalardo, ... International Journal of Electronics and Telecommunications, 2015 | 39 | 2015 |
Embedded damage localization subsystem based on elastic wave propagation T Wandowski, P Malinowski, W Ostachowicz, M Rawski, P Tomaszewicz, ... Computer‐Aided Civil and Infrastructure Engineering 30 (8), 654-665, 2015 | 29 | 2015 |
A first attempt to cloud-based user verification in distributed system M Wozniak, D Polap, G Borowik, C Napoli 2015 Asia-Pacific Conference on Computer Aided System Engineering, 226-231, 2015 | 25 | 2015 |
Cost-efficient synthesis for sequential circuits implemented using embedded memory blocks of FPGA's G Borowik, B Falkowski, T Luba 2007 IEEE Design and Diagnostics of Electronic Circuits and Systems, 1-6, 2007 | 25 | 2007 |
Data-driven models in machine learning for crime prediction ZM Wawrzyniak, S Jankowski, E Szczechla, Z Szymański, R Pytlak, ... 2018 26th International Conference on Systems Engineering (ICSEng), 1-8, 2018 | 22 | 2018 |
Data mining approach for decision and classification systems using logic synthesis algorithms G Borowik Advanced Methods and Applications in Computational Intelligence, 3-23, 2014 | 22 | 2014 |
Logic synthesis strategy for FPGAs with embedded memory blocks M Rawski, G Borowik, T Luba, P Tomaszewicz, BJ Falkowski 2009 MIXDES-16th International Conference Mixed Design of Integrated …, 2009 | 21 | 2009 |
Energy characteristic of a processor allocator and a Network-on-Chip D Zydek, H Selvaraj, G Borowik, T Łuba Zielona Góra: Uniwersytet Zielonogórski, 2011 | 20 | 2011 |
Synthesis of finite state machines for implementation with programmable structures T Łuba, G Borowik, A Kraśniewski Electronics and Telecommunications Quarterly 55 (2), 183-200, 2009 | 20 | 2009 |
Benchmark tests on improved merge for big data processing Z Marszalek, M Wozniak, G Borowik, R Wazirali, C Napoli, G Pappalardo, ... 2015 Asia-Pacific Conference on Computer Aided System Engineering, 96-101, 2015 | 18 | 2015 |
Boolean function complementation based algorithm for data discretization G Borowik Computer Aided Systems Theory-EUROCAST 2013: 14th International Conference …, 2013 | 18 | 2013 |
Logic synthesis method for pattern matching circuits implementation in FPGA with embedded memories G Borowik, T Luba, BJ Falkowski 2009 12th International Symposium on Design and Diagnostics of Electronic …, 2009 | 18 | 2009 |
Authorship semantical identification using holomorphic Chebyshev projectors C Napoli, E Tramontana, GL Sciuto, M Wozniak, R Damaevicius, ... 2015 Asia-Pacific Conference on Computer Aided System Engineering, 232-237, 2015 | 16 | 2015 |
Control system design based on modern embedded systems A Khamis, D Zydek, G Borowik, DS Naidu Computer Aided Systems Theory-EUROCAST 2013: 14th International Conference …, 2013 | 16 | 2013 |
Statechart-based controllers synthesis in FPGA structures with embedded array blocks G Łabiak, G Borowik International Journal of Electronics and Telecommunications, 2010 | 16 | 2010 |
Improved state encoding for FSM implementation in FPGA structures with embedded memory blocks G Borowik Electronics and Telecommunications Quarterly 54 (1), 9-28, 2008 | 16 | 2008 |
Features reduction using logic minimization techniques G Borowik, T Łuba, D Zydek International Journal of Electronics and Telecommunications 58 (1), 2012 | 15 | 2012 |