| WarpPool: Sharing requests with inter-warp coalescing for throughput processors J Kloosterman, J Beaumont, M Wollman, A Sethia, R Dreslinski, T Mudge, ... Proceedings of the 48th International Symposium on Microarchitecture, 433-444, 2015 | 53 | 2015 |
| Regless: Just-in-time operand staging for GPUs J Kloosterman, J Beaumont, DA Jamshidi, J Bailey, T Mudge, S Mahlke Proceedings of the 50th Annual IEEE/ACM International Symposium on …, 2017 | 43 | 2017 |
| Avguardian: Detecting and mitigating publish-subscribe overprivilege for autonomous vehicle systems DK Hong, J Kloosterman, Y Jin, Y Cao, QA Chen, S Mahlke, ZM Mao 2020 IEEE European Symposium on Security and Privacy (EuroS&P), 445-459, 2020 | 19 | 2020 |
| Dynamically allocating storage elements to provide registers for processing thread groups J Kloosterman, J Beaumont, DA Jamshidi, J Bailey, T Mudge, S Mahlke US Patent 10,585,701, 2020 | 2 | 2020 |
| Scratch that (but cache this): A hybrid register cache/scratchpad for GPUs J Bailey, J Kloosterman, S Mahlke IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 2 | 2018 |
| Data Resource Management in Throughput Processors J Kloosterman | | 2018 |
Scott MahlkeProfessor, Electrical Engineering and Computer Science Dept., University of MichiganVerified email at umich.edu
