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Partha Sharathi Mallick
Partha Sharathi Mallick
Department of Electronics Engineering, Vellore Institute of Technology (VIT)
Verified email at vit.ac.in
Title
Cited by
Cited by
Year
Design and analysis of multiplier using approximate 15-4 compressor
R Marimuthu, YE Rezinold, PS Mallick
IEEE Access 5, 1027-1036, 2016
812016
Towards realisation of mixed carbon nanotube bundles as VLSI interconnects: A review
PU Sathyakam, PS Mallick
Nano Communication Networks 3 (3), 175-182, 2012
382012
Transient analysis of mixed carbon nanotube bundle interconnects
PU Sathyakam, PS Mallick
Electronics letters 47 (20), 1134-1136, 2011
372011
Role of semiconducting carbon nanotubes in crosstalk reduction of CNT interconnects
PU Sathyakam, A Karthikeyan, PS Mallick
IEEE transactions on nanotechnology 12 (5), 662-664, 2013
312013
Inter-CNT capacitance in mixed CNT bundle interconnects for VLSI circuits
PU Sathyakam, PS Mallick
International Journal of Electronics 99 (10), 1439-1447, 2012
282012
Design of high speed and low power 15-4 compressor
R Marimuthu, M Pradeepkumar, D Bansal, S Balamurugan, PS Mallick
2013 International Conference on Communication and Signal Processing, 533-536, 2013
262013
Modeling the voltage nonlinearity of high-k MIM capacitors
D Kannadassan, R Karthik, MS Baghini, PS Mallick
Solid-state electronics 91, 112-117, 2014
232014
Optimization techniques for CNT based VLSI interconnects—a review
A Karthikeyan, PS Mallick
Journal of Circuits, Systems and Computers 26 (03), 1730002, 2017
222017
Design of 8-4 and 9-4 compressors forhigh speed multiplication
R Marimuthu, D Bansal, S Balamurugan, PS Mallick
American Journal of Applied Sciences 10 (8), 893-900, 2013
212013
Enhancement of test data compression with multistage encoding
S Sivanantham, M Padmavathy, G Gopakumar, PS Mallick, JRP Perinbam
Integration 47 (4), 499-509, 2014
202014
Low power reconfigurable multiplier with reordering of partial products
MVP Kumar, S Sivanantham, S Balamurugan, PS Mallick
2011 International Conference on Signal Processing, Communication, Computing …, 2011
202011
Size modulation of nanocrystalline silicon embedded in amorphous silicon oxide by Cat-CVD
Y Matsumoto, S Godavarthi, M Ortega, V Sánchez, S Velumani, ...
Thin Solid Films 519 (14), 4498-4501, 2011
192011
High‐speed sub‐threshold operation of carbon nanotube interconnects
P Uma Sathyakam, PS Mallick, AA Saxena
IET Circuits, Devices & Systems 13 (4), 526-533, 2019
162019
Future dielectric materials for CNT interconnects-possibilities and challenges
PU Sathyakam, PS Mallick
Journal of Nano Research 52, 21-42, 2018
162018
Bias and geometry optimization of FinFET for RF stability performance
K Sivasankaran, PS Mallick
Journal of Computational Electronics 13, 250-256, 2014
152014
Nanostructured metal–insulator–metal capacitor with anodic titania
D Kannadassan, R Karthik, MS Baghini, PS Mallick
Materials science in semiconductor processing 16 (2), 274-281, 2013
142013
Effect of dislocation scattering on electron mobility in GaN
R Karthik, PU Sathyakam, PS Mallick
Nat. Sci 3, 812-815, 2011
142011
Error compensation techniques for fixed-width array multiplier design—A technical survey
S Balamurugan, PS Mallick
Journal of Circuits, Systems and Computers 26 (03), 1730003, 2017
132017
Nanostructured bilayer anodic TiO2/Al2O3 metal-insulator-metal capacitor
R Karthik, D Kannadassan, MS Baghini, PS Mallick
Journal of nanoscience and nanotechnology 13 (10), 6894-6899, 2013
132013
Impact of device geometry and doping concentration variation on electrical characteristics of 22nm FinFET
K Sivasankaran, PS Mallick, TRKK Chitroju
2013 IEEE International Conference ON Emerging Trends in Computing …, 2013
132013
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