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Praneet Adusumilli
Praneet Adusumilli
IBM Research
Verified email at us.ibm.com
Title
Cited by
Cited by
Year
Recessed metal liner contact with copper fill
P Adusumilli, VS Basker, H Bu, Z Liu
US Patent 9,496,225, 2016
2862016
A 7nm FinFET technology featuring EUV patterning and dual strained high mobility channels
R Xie, P Montanini, K Akarvardar, N Tripathi, B Haran, S Johnson, T Hook, ...
2016 IEEE International Electron Devices Meeting (IEDM), 2.7. 1-2.7. 4, 2016
1722016
Future on-chip interconnect metallization and electromigration
CK Hu, J Kelly, H Huang, K Motoyama, H Shobha, Y Ostrovski, JHC Chen, ...
2018 IEEE International Reliability Physics Symposium (IRPS), 4F. 1-1-4F. 1-6, 2018
652018
Tungsten and cobalt metallization: A material study for MOL local interconnects
V Kamineni, M Raymond, S Siddiqui, F Mont, S Tsai, C Niu, A Labonte, ...
2016 IEEE International Interconnect Technology Conference/Advanced …, 2016
572016
Confined PCM-based Analog Synaptic Devices offering Low Resistance-drift and 1000 Programmable States for Deep Learning
W Kim, RL Bruce, T Masuda, GW Fraczak, N Gong, P Adusumilli, ...
2019 Symposium on VLSI Technology, T66-T67, 2019
552019
Experimental study of nanoscale Co damascene BEOL interconnect structures
J Kelly, JHC Chen, H Huang, CK Hu, E Liniger, R Patlolla, B Peethala, ...
2016 IEEE International Interconnect Technology Conference/Advanced …, 2016
532016
Atom-probe tomography of semiconductor materials and device structures
LJ Lauhon, P Adusumilli, P Ronsheim, PL Flaitz, D Lawrence
MRS bulletin 34 (10), 738-743, 2009
532009
Low resistivity wrap-around contacts
P Adusumilli, AV Carr, A Reznicek, O van der Straten
US Patent 10,074,727, 2018
432018
Electromigration and resistivity in on-chip Cu, Co and Ru damascene nanowires
CK Hu, J Kelly, JHC Chen, H Huang, Y Ostrovski, R Patlolla, B Peethala, ...
2017 IEEE International Interconnect Technology Conference (IITC), 1-3, 2017
432017
FinFET performance with Si: P and Ge: Group-III-metal metastable contact trench alloys
O Gluschenkov, Z Liu, H Niimi, S Mochizuki, J Fronheiser, X Miao, J Li, ...
2016 IEEE International Electron Devices Meeting (IEDM), 17.2. 1-17.2. 4, 2016
392016
Contacts in Advanced CMOS: History and Emerging Challenges
C Lavoie, P Adusumilli, AV Carr, JSJ Sweet, AS Ozcan, E Levrau, N Breil, ...
ECS Transactions 77 (5), 59-79, 2017
352017
High performance middle of line interconnects
P Adusumilli, A Reznicek, O van der Straten, CC Yang
US Patent 20170278747A1, 2016
352016
ECS Meeting Abstracts
AR LaVoie, P Adusumilli, AV Carr, JSJ Sweet, AS Ozcan, E Levrau, ...
35*
Bulk magnetic properties of CdFe2O4 in nano-regime
R Desai, RV Mehta, RV Upadhyay, A Gupta, A Praneet, KV Rao
Bulletin of Materials Science 30 (3), 197-204, 2007
342007
Ti and NiPt/Ti liner silicide contacts for advanced technologies
P Adusumilli, E Alptekin, M Raymond, N Breil, F Chafik, C Lavoie, ...
2016 IEEE Symposium on VLSI Technology, 1-2, 2016
302016
Three-dimensional atomic-scale mapping of Pd in thin films
YC Kim, P Adusumilli, LJ Lauhon, DN Seidman, SY Jung, HD Lee, ...
Applied Physics Letters 91 (11), 113106, 2007
302007
Impact of heater configuration on Reset characteristics of PCM Mushroom cell
A Chandra, P Oldiges, CT Chen, TM Philip, P Adusumilli, M BrightSky
2019 IEEE Albany Nanotechnology Symposium (ANS), 1-6, 2019
28*2019
Field-effect transistor device having a metal gate stack with an oxygen barrier layer
P Adusumilli, A Callegari, JB Chang, C Choi, MM Frank, MA Guillorn, ...
US Patent 8,415,677, 2013
252013
Dual metal interconnect structure
P Adusumilli, H Jagannathan, K Motoyama, O van der Straten
US Patent 9741812B1, 2017
232017
Metal cap protection layer for gate and contact metallization
P Adusumilli, H Jagannathan, A Reznicek, O van der Straten, CC Yang
US Patent App. 14/852,459, 2017
232017
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