| A novel algorithm for hardware trojan detection through reverse engineering S Rajendran, ML Regeena IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021 | 13 | 2021 |
| Fin FETs and their application as load switches in micromechatronics S Rajendran, RM Lourde 2015 IEEE international symposium on nanoelectronic and information systems …, 2015 | 9 | 2015 |
| Security Threats of Embedded Systems in IoT Environment S Rajendran, RM Lourde Inventive Communication and Computational Technologies, 745-754, 2020 | 4 | 2020 |
| Sensitivity analysis of testability parameters for secure IC design S Rajendran, M Lourde Regeena IET Computers & Digital Techniques 14 (4), 158-165, 2020 | 3 | 2020 |
| Ab-initio study on FinFETs and their application in loT aided robotics S Rajendran, RM Lourde 2016 Sixth International Symposium on Embedded Computing and System Design …, 2016 | 2 | 2016 |
| FinFET Optimization in the Design of 6T SRAM Cell S Rajendran, RM Lourde International conference on Modelling, Simulation and Intelligent Computing …, 2020 | 1 | 2020 |
| An efficient software tool based on SCOAP for testability analysis of combinational circuits S Rajendran, M Lourde Int. J. Simul.–Syst., Sci. Technol. 20 (1), 30.1-30.10, 2019 | 1 | 2019 |
| Modeling and optimization of a cantilever based DNA sensor for biomedical applications S Rajendran, R Mary Lourde 2015 international conference on electrical electronics signals …, 2015 | 1 | 2015 |
| Application of Testability Analysis in Hardware Security S Rajendran, M Lourde | | 2020 |
| Security of an IoT Network: A VLSI Point of View S Rajendran, A Syed, RM Lourde Inventive Communication and Computational Technologies: Proceedings of …, 2020 | | 2020 |
| Testability Analysis and its Application to Hardware Security S Rajendran, M Lourde International Journal of Circuits and Electronics 5, 2020 | | 2020 |
| Investigations on Testability Analysis and its Applications in Secure IC Design S Rajendran Pilani, 0 | | |
