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He Huang (黄河)
He Huang (黄河)
CPU Microarchitect, AMD
在 amd.com 的电子邮件经过验证 - 首页
标题
引用次数
引用次数
年份
Architecture supported synchronization-based cache coherence protocol for many-core processors
H Huang, N Yuan, W Lin, G Long, F Song, L Yu, Y Liu, L Liu, Y Zhou, X Ye, ...
CMP-MSI’08, ISCA Workshop, 2008
172008
Rainbow: Efficient Memory Race Recording with High Replay Parallelism for Relaxed Memory Model
X Qian, H Huang, B Sahelices, D Qian
High Performance Computer Architecture (HPCA), 2013 IEEE 19th International …, 2013
22013
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