Follow
Ashish Tiwari
Ashish Tiwari
Department of Electronics and Telecommunication, G.H.Raisoni Pune
Verified email at raisoni.net
Title
Cited by
Cited by
Year
Journey of visual prosthesis with progressive development of electrode design techniques and experience with CMOS image sensors: A review
A Tiwari, RH Talwekar
IETE Journal of Research 65 (2), 172-200, 2019
142019
Theoretical investigation on structural transformation of TiN to HfN monolayer: A first principles study
ML Verma, A Tiwari
Chemical Physics Letters 781, 138992, 2021
112021
First-principles study on the structural, electronic, optical, mechanical, and adsorption properties of cubical transition metal nitrides MN (M= Ti, Zr and Hf)
A Tiwari, RH Talwekar, ML Verma
Journal of Electronic Materials 50 (6), 3312-3325, 2021
92021
An innovative approach of computational fault detection using design for testability of CP-PLL
A Tiwari, AK Sahu
2012 NATIONAL CONFERENCE ON COMPUTING AND COMMUNICATION SYSTEMS, 1-6, 2012
92012
Design for testability architecture using the existing elements of CP-PLL for digital testing application in VLSI ASCI design
A Tiwari, AK Shu, GR Sinha
Int. J. VLSI Signal Process. Appl 2 (1), 56-64, 2012
92012
Review On Progressive Development of CMOS Imagers for Visual Prosthesis and New Aspects
DRHT Ashish Tiwari
Journal of Advanced Research in Dynamical and Control Systems 9 (Sp-14 …, 2017
8*2017
Analysis and mathematical modelling of charge injection effect for efficient performance of CMOS imagers and CDS circuit
A Tiwari, RH Talwekar
IET Circuits, Devices & Systems 14 (7), 1038-1048, 2020
42020
Clocking scheme, Reset noise analysis and reduction technique for CMOS Image Sensors utilized in Subretinal Implant
A Tiwari, RH Talwekar
2019 IEEE 5th International Conference for Convergence in Technology (I2CT), 1-6, 2019
32019
Design and analysis of low-power PLL for digital applications
A Tiwari, RP Sahu
International Conference on Advanced Computing Networking and Informatics …, 2018
32018
Implementation of a novel 2-stage DFT structure for CMOS pixel sensors utilizing on-chip CP-PLL clock (for retinal implant system)
RHT A.Tiwari
International conference on Microelectronic Devices, Circuits and Systems …, 2017
32017
A DFT study on transformation of TiN's atomic chain structure into atomic chain structures of HfN and ZrN
NK Verma, SK Srivastava, ML Verma, A Tiwari
Materials Chemistry and Physics 293, 126945, 2023
12023
Optical property analysis of transition and alkaline metal doped MoS2 bulk layers for photo-sensor applications
RH Talwekar, A Tiwari
Materials Today: Proceedings 59, 692-698, 2022
12022
Mixed signal IC (CP-PLL) Testing scheme using a novel approach
A Tiwari, AK Sahu
International Journal of Scientific & Engineering Research 3 (5), 1-8, 2012
12012
Reset Noise Sources and Suppression Strategies for CMOS Image Sensors
SB Virendra, CD Verma, A Tiwari
International Journal of Innovative Science and Research Technology 7 (5 …, 2022
2022
Structural and Electronic Property Analysis of Transition and Alkaline Metal Doped MoS2 Bulk Layers for Photo-Sensor Applications
RH Talwekar, A Tiwari
2021 IEEE 6th International Conference on Computing, Communication and …, 2021
2021
Mathematical Modeling of Non-Linearity due to Charge Injection Effect in CMOS Imagers
A Tiwari, RH Talwekar
2021 International Conference on Advances in Electrical, Computing …, 2021
2021
Robust Visual Tracking using Sparse Principle Component Analysis and Haar-like Features
KT Ashish Tiwari, Snehlata Raisagar
International Journal for Scientific Research & Development 5 (9), 519-524, 2017
2017
A Survey on Object Tracking in Video
AT Snehlata Raisagar
International Journal for Scientific Research & Development 5 (7), 820-825, 2017
2017
Testing of Mixed Signal ICs: A Review
A Tiwari
Global Journal for Research Analysis 3 (8), 2014
2014
A novel approach to low power Analog to Digital Converter using parallel realization
ATC Verma
AICON-CSIT, 2012
2012
The system can't perform the operation now. Try again later.
Articles 1–20