| The enhancement of security measures in advanced encryption standard using double precision floating point multiplication model KHK B. Srikanth, M. Siva Kumar , J.V.R. Ravindra Transactions on emerging telecommunications technologies, 13, 2020 | 11* | 2020 |
| Double Precession Floating Point Multiplier using Schonhage – Strassen Algorithm used for FPGA Accelerator KHK B. Srikanth, M. Siva Kumar, J.V.R. Ravindra International Journal of Emerging Trends in Engineering Research 7 (11), 677 …, 2019 | 7 | 2019 |
| Design And Implementation of Low-Power High-Performance 2-4- and 4-16-Line Decoders using Adiabatic Logic Circuits GSK B. Srikanth, M. Sri Hari, D. Praveen Kumar International Journal of Engineering and Advanced Technology 9 (1), 2894 - 2901, 2019 | 5* | 2019 |
| Design and Analysis of Video Compression Technique Using HEVC Intra-Frame Coding KS Reddy, B Srikanth, CL Reddy International Journal of Engineering Sciences & Research Technology, 0 | 2* | |
| Design and Implementation of Power-Efficient Cryptography Scheme Using a Novel Multiplication Technique DA B. Srikanth, J. V. R. Ravindra, P. Ramakrishna Wireless Personal Communications, 2023 | | 2023 |
| High Performance Double Precision Floating Point Computation Using FPGA Based Accelerators and AES Model B Srikanth Vaddeswaram, 2021 | | 2021 |
| CTS-SRAM: Design of Low Power CMOS Transmission Gate and Sleep Transistor based SRAM Cell S Singh, E Prasanna, B Srikanth International Journal of Engineering & Technology 7 (4.19), 563-568, 2018 | | 2018 |
| Performance evaluation and analysis of 64-quadrature amplitude modulator using Xilinx Spartan FPGA BS Joseph Anthony Prathap, T.S.Anandhi, K. Ramash Kumar International Journal of Engineering & Technology 7 (2.8), 570-577, 2018 | | 2018 |
| Floating Point Multiplication Based on Schonhage Strassen Algorithm KHK B. Srikanth, M. Siva Kumar International Journal of Engineering & Technology 7 (2.20), 4, 2018 | | 2018 |
| Towards Reducing Area and Power of Multiplier with Double Precision Floating Point Computations Using FPGA Accelerators JVRR B. Srikanth, M. Siva Kumar , K. Hari Kishore Journal of Advanced Research in Dynamical and Control Systems 9 (18), 10, 2017 | | 2017 |
| Efficient Majority Logic Fault Detection in Memory Applications with Difference Set Codes BRN B. Srikanth, M. Gopi Krishna, P. Srikanth International Journal of Scientific Engineering and Technology Research 5 …, 2016 | | 2016 |
| Design of Low Power Level Shifter for Multi Supply Voltage System Using MTCMOS BI Anjaneyulu K, Srikanth B The International Journal of Science & Technoledge 3 (8), 2015 | | 2015 |
| Design Round Robin and Interleaving Arbitration algorithm for NOC B Srikanth International Journal of Engineering Sciences & Research Technology 3 (3 …, 2014 | | 2014 |
