Low inductance pcb layout for gan devices: Interleaving scheme J Hammer, IG Zurbriggen, MA Saket, M Ordonez 2021 IEEE Applied Power Electronics Conference and Exposition (APEC), 1537-1542, 2021 | 7 | 2021 |
Modeling the effects of printed-circuit-board parasitics on the switching performance of wide-bandgap applications J Hammer, M Ordonez, P Ksiazek 2019 IEEE Applied Power Electronics Conference and Exposition (APEC), 1231-1236, 2019 | 3 | 2019 |
LLC Converters with GaN: Commutation Loop Capacitance J Hammer, MA Saket, M Ordonez 2022 IEEE Applied Power Electronics Conference and Exposition (APEC), 1752-1756, 2022 | 1 | 2022 |
Multi-Pulse Si-MOSFET Gate Driving Utilizing Gate Loop Inductance J Hammer, IG Zurbriggen, M Ordonez IEEE Open Journal of Power Electronics, 2023 | | 2023 |
Gate-Driver Design and Optimization in Power Converters E Serban, J Hammer, J Wassmuth, M Ordonez PCIM Europe 2023; International Exhibition and Conference for Power …, 2023 | | 2023 |
Flexible AC Phase Configurable NPC-based Converter Topology E Serban, J Hammer, C Pondiche, M Ordonez 2021 IEEE Energy Conversion Congress and Exposition (ECCE), 69-76, 2021 | | 2021 |